M. Tech VLSI Design programme

bullet Open Educational Resources (OER) (File Format: .pdf, File Size: 544 KB, Date: 09/01/2023)

bullet Instructions for Registration on Digilocker Account for joining National Academic Depository (NAD) Platform) (File Format: .pdf, File Size: 261 KB, Date: 16/12/2022)

bullet AICTE Compliance Report (File Format: .pdf, File Size: 135 KB, Date: 28/8/2014)

bullet Revised fee structure by the University (File Format: PDF, File Size: 119 KB ,Date: 22/09/2022)

bullet NBA & NAAC Accreditation Status (File Format: PDF, File Size: 139 KB ,Date: 28/02/2022)

bullet Faculty List: (File Format: PDF, File Size: 109 KB ,Date: 21/04/2022)

bullet AICTE Approvals: (File Format: ZIP, File Size: 6.1 MB ,Date: 08/12/2023)

bullet Admission Procedure (File Format: .mp4, File Size: 19 MB, Date: 05/04/2024)

bullet CDAC Admission Brochure 2024-2025 (File Format: .pdf, File Size: 8.9 MB, Date: 05/04/2024)

The Admission Brochures and other related details in this regard are available on the University website www.ipu.ac.in

bullet MANDATORY DISCLOSURE (File Format: PDF, File Size: 1.2 MB ,Date: 08/12/2023)

bullet AICTE Feedback for Students & Faculty

M. Tech VLSI Design programme of CDAC, Noida is AICTE approved and affiliated to Guru Gobind Singh Indraprastha University (GGSIPU), Delhi

CDAC, Noida is running the M.Tech (VLSI) Program since 2004. The intake is 25 students per year. The M Tech Programmge is of two years. The objective of the program is to offer an industry specific Career oriented advanced courses in VLSI Design and create quality manpower in the field of VLSI Engineering to promote VLSI research, education, and training in India. The Research area in M. Tech (VLSI) is mainly focused on Low power circuit designing, Analog Digital Mixed signal design circuitry and characterization. Fields in which interdisciplinary work has been undertaken include, Algorithms for design Automation, RFID for wireless communication, wireless sensor networks, and Low power DSP. Special features in M. Tech (VLSI Design) programme include regular seminars from external experts in all the courses. Approximately 325 highly skilled manpower generated by the division are already working in the industries like Cadence, Synopsys, Mentor Graphics, Wipro, Intel, HCL and many more.

For Further Details Please Contact:
Academic Block , B-30,Institution Area,
Sector - 62,Noida - 201307,UP,India
Ph. No: 0120-3063380
email:artinoor[at]cdac[dot]in