Reconfigurable Computing (RC) is an interesting paradigm to accelerate applications by targeting algorithms into programmable hardware.

One of the enabling technologies useful in RC is the field-programmable gate array (FPGA). Putting FPGAs on add-on cards or motherboards allow FPGAs to serve as compute-intensive co-processors. FPGAs can be re-configured over and over again, to perform multitude of operations. This enables application-specific, dynamically "programmable" hardware accelerators.

A number of Scientific & Engineering applications find RC technology useful. To name a few: satellite networks with adaptive communication algorithms, scalable computing systems, Encryption/Decryption engines and Pattern recognition.

C-DAC has pioneered the RC technology for HPC in India through its state-of-the-art design of hardware, system software and hardware libraries ('Avatars'). Avatars are dynamically changeable circuits, corresponding to the compute intensive routines of the application code. C-DAC with its expertise in RC is capable of providing accelerated solutions for a wide spectrum of scientific and engineering areas.

Scientific and engineering applications in the areas of fracture mechanics, radio astronomy and bioinformatics are ported on RC, providing up to 240X speedup compared to purely software based solutions. These speedups can further increase by manifolds based on the hardware configuration and nature of applications. In order to obtain same performance as RC hardware, one would require a huge cluster of computing nodes.

• Bioinformatics sequence search solution using RC, gave 240 times faster results.
• C-DAC's own fracture mechanics code, having double precision Cholesky factorization and forward-backward substitution steps ported on RC provided 16X speedup.
• High speed data acquisition and signal processing solutions designed for Very Long Baseline Interferometry (VLBI) and power spectrum experimentation in radio astronomy, replaced sizable computing cluster.
• Double precision matrix multiplication implemented on RC performed better than the Intel math kernel library.

• Multi-million gate FPGAs for mapping compute intensive portions of application codes
• Standard bus interface like PCI/PCI-X/PCI Express
• System software Interface for all standard Linux distributions
• Low power consumption
• FCC and CE compliant

Mr. Sajish Chandrababu

Centre for Development of Advanced Computing

Pune University Campus,

Ganesh Khind,

Pune - 411 007 India.

Tel: +91-20-25503100 Ext. : 463

Email: sajishc[at]cdac[dot]in