DIR-V Program - C-DAC continuous contributions in High-Performance VEGA Microprocessors

Pune
January 11, 2025

DIR-V Program: C-DAC continuous contributions in High-Performance VEGA Microprocessors.

The Government of India's DIR-V program aims to establish India as a leader in electronics. As part of the DIR-V program, C-DAC has successfully completed the design and development of the VEGA series of microprocessors including India's first indigenous 64-bit multi-core RISC-V based Superscalar Out-of-order Processor. The VEGA series comprise of 32/64-bit Single/Dual/Quad Core superscalar Out-of-Order high performance processor cores based on RISC-V Instruction Set Architecture.

One VEGA based SoC ASIC and two DIR V VEGA processorbased development boards were launched during the visit of Shri Ashwini Vaishnaw, Honourable - Minister of Railways, Minister of Information and Broadcasting and Minister of Electronics and Information Technology in gracious presence of Shri S. Krishnan, Secretary of the Ministry of Electronics and Information Technology (MeitY); Smt Sunita Verma, Group Co-ordinator (R&D), MeitY; Shri E Magesh, Director General, Shri Sanjay Wandhekar, Centre Head Pune and other senior officials.

Single Core VEGA Processor based THEJAS64 SoC ASIC in SCL 180nm

C-DAC announces the successful fabrication of THEJAS64, a 64-bit Single-core SoC chip at SCL, Chandigarh. This landmark achievement marks India's advancement in microprocessor technology which is fully indigenous design and fabrication based on the open-standard RISC-V architecture. It is suitable for diverse applications, from embedded systems to industrial use cases which enhances India's technological independence and fosters a robust and secure domestic ecosystem.

ARIES NOVA& ECO Development Boards

C-DAC announces the launch of ARIES NOVA&ECO Development Boards, a new hardware platform for embedded systems development, powered by the indigenous THEJAS32 SoC featuring the VEGA ET1031 Microprocessor.

ARIES NOVAis a compact and breadboard-friendly design, ideal for IoT and wearable applications, affordable robotics and interactive projects that need a small, easy-to-use microcontroller.

ARIES ECO is a cost-effective development board for embedded systems enthusiasts.Its versatile features including multiple communication interfaces and GPIOs are added advantages which supports standalone operation with various power options. This cost-effective platform is expected to be favourite among the budding talents in embedded arena.

The open-source RISC-V architecture enables flexibility and innovation and fosters hands-on learning and development in embedded systems.

The launch of VEGA development boards and indigenous processor by Shri Ashwini Vaishnaw,Honourable - Minister of Railways, Minister of Information and Broadcasting and Minister of Electronics and Information Technologygives India significant impetus to the progress of the secure technological ecosystem.This reflects the spirit of Atmanirbhar Bharat, reducing reliance on imported technology.

Shri S. Krishnan, Secretary of the Ministry of Electronics and Information Technology motivated the teams in C-DAC and urged them in to anchor such opportunities in futuristic developments. He mentioned that being an Applied R&D lab, C-DAC can act as the catalyst in transforming many of the R&D outcome towards usable solutions across industries.

Shri E Magesh, Director General mentioned that C-DAC's three-decade leadership has transformed India's technological landscape. Central to this domain, we have played a pivotal role in the DIR-V Program evolution since a decade into today's reality through sustained efforts.

Smt Sunita Verma, Group Co-ordinator (R&D), MeitY lauded the efforts of the rapid technological progress and appreciated C-DAC for playing a vital role in driving innovation and creating trailblazing technologies.