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PG Diploma In Embedded Systems and Design (PG-DESD)

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(File Type: PDF, File Size: 445 KB, Date: 21/05/2024)


Realizing the growth of embedded systems in day-to-day life and the need for trained manpower in this promising area, C-DAC has launched a Post Graduate Diploma in Embedded Systems Design (PG-DESD) for Engineers in computers, electronics and IT. Embedded Systems is a unique field, where engineers need to have sound knowledge in hardware and software design. Keeping this aspect in view, C-DAC has designed the diploma giving equal emphasis to hardware and software, enabling engineers to face challenges in the design and development of state of the art embedded systems. The latest curriculum includes a module on Internet of Things (IoT), specifically focusing on IoT architectures, applications, standards and protocols.

The educational eligibility criteria for PG-DESD course is

  • Graduate in Engineering or Technology (10+2+4 or 10+3+3 years) in IT / Computer Science / Electronics / Telecommunications / Electrical / Instrumentation, OR
  • MSc/MS (10+2+3+2 years) in Computer Science, IT, Electronics. 
  • The candidates must have secured a minimum of 55% marks in their qualifying examination.

PG-DESD course will be delivered in fully PHYSICAL mode. The total course fee and payment details is as detailed herein below:

The total course fee is INR. 90,000/- plus Goods and Service Tax (GST) as applicable by Government of India (GOI).

The course fees for PG-DESD has to be paid in two installments as per the schedule.

  • First installment is INR. 10,000/- plus Goods and Service Tax (GST) as applicable by GOI.
  • Second installment is INR. 80,000/- plus Goods and Service Tax (GST) as applicable by GOI.

The course fee includes expenses towards delivering classes, conducting examinations, final mark-list and certificate, and placement assistance provided.

The first installment course fee of Rs 10,000/- + GST on it as applicable at the time of payment is to be paid online as per the schedule. It can be paid using credit/debit cards through the payment gateway. The first installment of the course fees is to be paid after seat is allocated during counseling rounds.

The second installment of the course fees is to be paid before the course commencement through NEFT.

NOTE: Candidates may take note that no Demand Draft (DD) or cheque or cash will be accepted at any C-DAC training centre towards payment of any installment of course fees.

  
Basics of Program Writing & Coding Practices, Overview of C Programming language, Introduction to GNU Toolchain and GNU Make utility, Linux environment and vi editor, Tokens of C - Keywords, Data-Types, Variables, Constants, Operators, Identifiers, Storage Class Specifiers, Control Flow Statements, Arrays, Multidimensional arrays, Data Input & Output, Strings, Loops, Functions and Recursion, Pointers - Introduction, Pointer Arithmetic, Pointers and Arrays, Pointers and Functions, Pointers and Strings, Structures, Unions, Enum, Typedef, Bit field operators and pointers with structures, Preprocessors, C and Assembly, Files, I/O, Variable number of arguments, Command Line arguments, Error handling, Debugging and Optimization of C programs, Bit operations, Handling portability issues in C, Hardware, Time, Space and Power aware Programming.

  

Introduction to Data Structures, Algorithms and Abstract Data Types, Complexity of Algorithms, Linked Lists, Stacks, Queues, Searching and Sorting Algorithms, Hashing, Trees.

  
Overview of Microcontrollers, Microprocessors and SoC, RISC vs CISC, Harvard vs Princeton Ar- chitectures, Overview of Computer Architecture, Embedded Memories, Timers/Counters, UART, SPI, PWM, WDT, Input Capture, Output Compare Modes, I2C,
CAN, LED, Switches, ADC, DAC, LCD, RTC, Bus Standards (USB, PCI), Programming in Assembly and Embedded C.

ARM: Overview of ARM Architecture and Organization, Introduction to Cortex-M Architecture, Programming Model and Instruction Set Architecture, Alignment and Endianness, Register access, State, Privilege, Stack, System Control Block, Power Modes, Memory Model, NVIC, Exception Handling, Bit- Banding, Peripheral Programming, SVCall, SysTick, PendSv, MPU, DMA, Mixing Assembly and C programs, Introduction to CMSIS & CMSIS Components, Overview of Cortex A & R architectures.

RISC V: Why RISC-V processor, RISC-V processor overview, ARM vs RISC-V, Modes in RISC-V, Setting up of necessary tools, RISC-V register set and calling convention, Instruction formats and type, Build Process, Practical examples of instructions, Detail description on Control and Status Registers, Exception handling, Examples in assembly
for exception handling, Interrupts, Interrupt Entry and Exit procedure.
Introduction to C-DAC VEGA processors

  
Introduction to Embedded Operating Systems, Anatomy of an Embedded Linux System - Boot- loader, Kernel, Root File System, Application -, Process Management, Interprocess Communi- cation & Synchronization, Memory Management, I/O subsystem & Embedded File Systems, POSIX Thread Programming, POSIX Semaphores, Mutexes, Conditional Variables, Barriers, Mes- sage Queues, Shared Memory, Debugging
and Testing of Multithreaded Applications, Socket Programming, Customizing Embedded Linux based on Yocto, Virtualization: Dockers & Containers.

  
The Embedded Linux Software Eco-System, Linux Kernel Modules and Module Programming, Char Device Drivers, Kernel Internals: Dynamic memory allocations, Handling Delays, Timers, Synchronization, Locking, I/O Memory and Ports, Interrupts, Deferred Executions, Driver De- bugging Techniques, Drivers for GPIO, I2C, and SPI, Pseudo Filesystems (procfs, sysfs).

  
Introduction to Real-Time Concepts, RTOS Internals & Real Time Scheduling, Performance Met- rics of RTOS, Task Specifications, Schedulability Analysis, Application Programming on RTOS, Porting of RTOS, Configuring RTOS, Building RTOS Image for Target platforms.

  
IoT: IoT Trends, IoT Architecture, IoT Applications, IoT Standards and Protocols, Wireless LAN: IEEE 802.11, Wireless PAN: IEEE 802.15.1 & 802.15.4, Zigbee, Bluetooth, BTLE, LPWAN (LoRa, NB- IoT), 6LowPAN, REST, CoAP, MQTT, Basics of Cryptography, Overview of IoT and Embedded security, Overview of 5G technologies.

Embedded AI: AI Fundamentals, Supervised Learning, Unsupervised Learning, Ensemble Techniques, Time Series Forecasting, Neural Networks and Deep Learning, Embedded AI applications, Embedded AI frameworks (CMSIS-NN, AIfES, TensorFlow- Lite, TensorFlow-Lite Micro etc), Feature Engineering, Model Selection & Tuning, Development and deployment of embedded ML models, Case Study on Embedded AI.

  
Percentage, Profit & Loss, Ratio & Proportion, Average, Mixture & Allegation, Simple Interest & Compound Interest, Number Systems , Series, Cyclicity & Remainders, Data Interpretation, Syllogism, Coding & Decoding, Blood Relations, Seating Arrangements (Linear & Circular), Ages, Puzzles, Time, Speed & Distance, Trains, Boats & Streams, Time & Work, Wages (Man days), Pipes & Cisterns, Clocks, Permutations & Combinations, Probability, Calendar Fundamentals of Communication, The Art of Communication, Personality Development, English Grammar, Correct Usage of English, Common Mistakes in English Communication, Listening Skills, Reading Skills, Writing Skills, Public Speaking, Presentation Skills, Group Discussions, Interpersonal Skills, Personal Interviews

  

Students are required to execute project work for the duration of four weeks (after the completion of all modules) as a part of this course. For seminar, students need to choose the topic themselves and give the seminar on the respective dates allocated by the concerned faculty members. The topic chosen by the students should be relevant to the Embedded Systems Design. Project work is distributed in the following phases:

  1. Study and Requirements Elicitation
  2. Design
  3. Implementation
  4. Testing
  5. Project report
  6. Viva Voce and Presentation

Students need to submit a project report at the conclusion of the project. Mentors should be allocated within 3 weeks of the course commencement and should be executed throughout the course duration. The students should maintain a logbook, which contains their day-to-day activities during the project phases. The mentor allocated for that project should sign this logbook regularly. The allocated 4 weeks should be focused on implementation, testing and consolidating the documentation.

The candidates will be trained in Hardware and Firmware design of Embedded System based applications, Internet of Things ( IoT), Project development and Management skills. At the end of the course students will be able to work as System design engineer and embedded engineer with good knowledge of RT Linux, Microcontroller and Microprocessor based design, Device driver and RTOS. Students can start career as Embedded Developer, tester and leads to project manager after having relevant experience.

 

C-DACs - Advanced Computing Training School
Address
:
No. 68, 4th Cross, Electronic City Phase 1, Hosur Road, Opp.BSNL Telephone Exchange Bengaluru
Karnataka 560100
Telephone
:
+91-80-28523300 / +91-80-25093400/
Contact Person
:
Mr. Arun Shankar
Fax
:
+91-80-28522590
e-Mail
:
actsb[at]cdac[dot]in
Courses
:
PG-DAC, PG-DESD, PG-DITISS, PG-DBDA, PG-DIoT , PG-DUASP

C-DACs - Advanced Computing Training School
Address
:
"TIDEL Park", 8th Floor,'D' Block (North), No.4, Rajiv Gandhi Salai, Taramani Chennai
Tamilnadu 600113
Telephone
:
044 - 22542226/7, 044-22542273
Contact Person
:
Ms.SUNANDHA D
Fax
:
+91-44-22542294
e-Mail
:
chnacts[at]cdac[dot]in
Courses
:
PG-DAC, PG-DESD, PG-DBDA, PG-DIoT

C-DACs - Advanced Computing Training School
Address
:
Plot No. 6 & 7, Hardware Park, Sy No. 1/1, Srisailam Highway, Pahadi Shareef Via Keshavagiri (Post), Hyderabad
Andhra Pradesh 500016
Telephone
:
7382053731 / 2
Contact Person
:
Mr. Sharanabasappa , Senior Technical Officer
Fax
:
e-Mail
:
cdachyd[at]cdac[dot]in
Courses
:
PG-DAC, PG-DVLSI, PG-DESD, PG-DITISS, PG-DASSD, PG-DBDA, PG-DUASP

C-DAC's Advanced Computing Training School
Address
:
C-DAC Innovation Park Sr. No. 34/B/1 Panchvati, Pashan Pune
Maharashtra 411008
Telephone
:
020-25503134/136/107
Contact Person
:
Mr. Parimal Wagh
Fax
:
NA
e-Mail
:
acts[at]cdac[dot]in
Courses
:
PG-DAC, PG-DVLSI, PG-DESD, PG-DITISS, PG-DAI, PG-DBDA, PG-DIoT , PG-DHPCAP, PG-DUASP, PG-DHPCSA
Sunbeam Institute of Information Technology
Address
:
Sunbeam IT Park, Phase-II (Rajiv Gandhi Infotech Park) Hinjewadi, Pune
Maharashtra 411057
Telephone
:
8447901102
Contact Person
:
Mr. Nitin Kudale, C.E.O.
Fax
:
020 –24260308
e-Mail
:
siit[at]sunbeaminfo[dot]com
Courses
:
PG-DAC, PreDAC, PG-DESD, PG-DMC, PG-DITISS, PG-DBDA

Q. What is the Eligibility for PG Diploma In Embedded Systems and Design?
A: The eligibility Criteris for PG-DESD is candidate holding any one of the following degrees :
  • Graduate in Engineering or Technology (10+2+4 or 10+3+3 years) in IT / Computer Science / Electronics / Telecommunications / Electrical / Instrumentation.

OR

  • MSc/MS (10+2+3+2 years) in Computer Science, IT, Electronics.
  • The candidates must have secured a minimum of 55% marks in their qualifying examination.
Q: What is the selection criterion?  
A: The selection process consists of a C-DAC Common Admission Test (C-CAT).
 
Q: What is Fee of course? 
A: The fees for the PG-DESD course is INR. 90,000/- (Rupees Ninety  Thousand  only) plus GST as applicable.
 
Q: When the course does commence?  
A: The PG Diploma courses is conducted twice in a year in the month of August and March. Admission Process will start in month of May and December every year.
 
Q: Duration of the course?  
A: The duration of course is 24 weeks approximately full-time course with 900 hours of Theory + Practical + Project Work.
 
Q: Infrastructure Facilities available?  
A: Fully equipped classrooms capacity to accommodate students and state-of-art labs to explore you computing skills
 
Q: Hostel & Canteen facility available?  
A: Accommodation for out station candidates is facilitated by some of centres. Please refer Admission Booklet.
 
Q: What is the medium of instruction for PG Diploma Courses? 
A: The medium of instruction for the PG Diploma Courses is English.
  
Q: Revision of the course contents, is it every six months?  
A: The course contents are revised according to the real world needs and when found relevant to the market demands.
 
Q: Do you have centralized placement cell?  
A: Yes we do have a centralized placement programme where the respective centers actively coordinate the task of organizing the campus interviews for all the students.
 
Q: What is the value of the course in the international market?  
A: The course has been a trend-setting course due to its unique curriculum and the opportunities that it generates; hence it gives the edge over above for the students and gives a international edge.
 

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